SR ENGINEER, APTD PWF

1. Drive improvement in wafer bonding and wafer thinning performance. 2. Coordinate experiments for technology development and yield improvement 3. Assist advanced package technology (chip stacking, 2.5D or 3D) research and development 4. Support project on-site execution and make decisions as technical consultant 5. Troubleshoot a variety of complex problems. Perform root cause analysis and resolve process engineering issues 6. Generate internal and external documentation for presentations and technical reports Technology Development 1. Understand department and organizational goals and objectives to ensure daily tasks align with Technology Development needs. 2. Engage in process development projects with cross-team interaction, providing expert contribution in materials characterization. 3. Coordinate mechanical characterization and testing for advanced packaging development efforts globally including US, Japan, and Singapore site. 4. Provide recommendations for test structure and test vehicle design for material property evaluation. 5. Review, summarize, and present data with recommendations of materials and lead discussions with packaging material suppliers to meet technical specifications and roadmaps. 1. At least 3 years experience in semiconductor related industry 2. Degree/Major: Master above (PhD. is plus) major in Chemistry, Physic, Material, engineering science related fields 3. Experience of wafer bonding and Si grinding / CMP technologies prefered 4. Innovative with independent thinking 5.