Contribute to the design, layout, and optimization of Memory, Logic, and Analog circuits for HBM products Perform parasitic modeling, design validation, reticle experiments, and tape-out revisions Collaborate with layout teams to meet floorplanning, placement, and routing requirements Conduct verification using industry-standard simulators and modeling tools Maintain technical expertise through continuous training and cross-group communication Partner with Product Engineering, Test, Probe, Process Integration, Assembly, and Marketing to ensure manufacturability and performance Engage with Standards, CAD, modeling, and verification teams to ensure design quality Drive innovation for future memory generations in a dynamic, collaborative environment Basic knowledge of CMOS circuit design and device physics Familiarity with schematic entry and simulation using FineSim and/or HSPICE Understanding of power network analysis and state machine logic Experience with Verilog modeling and simulation tools Strong problem-solving and analytical skills Effective communication skills for multi-functional collaboration Experience with scripting languages (Python, TCL, Perl, etc.) Familiarity with DRAM memory concepts and SoC/IO interfaces Ability to convey complex technical concepts clearly in verbal and written form Enthusiastic great teammate with a proactive approach Experience working in a collaborative, fast-paced engineering environment