DV Engineer

Condor is seeking a skilled and personable DV Engineer to become a valuable member of our team. In this position, you will have the opportunity to investigate innovative strategies to enhance the performance of our high-performance RISC-V processors, with a focus on all functions within the CPU core and memory systems. You will work collaboratively with a talented team, including engineers from RTL design, verification, and software groups, to propose enhancements, optimizations, and features based on performance assessments and PPA impact.

Here is what you will do:

• Architect and implement test benches using UVM-based methodologies.
• Architect and implement verification components using UVM-based methodologies.
• Perform block-level verification to validate block performance and adherence to requirements.
• Develop and execute verification plans based on specifications.
• Define, implement, and analyze coverage
• Architect and implement formal verification methodologies.
• Create automation tools to enhance verification processes.
• Conduct performance testing for design validation.

Here is the background we hope you have:

• A Master's or Bachelor's degree in Electronic/Electrical Engineering or Computer Science
• 6 years of experience in Verification
• Must possess a deep understanding of microprocessor design, computer architecture, and digital circuit design.
• Must understand ASIC design verification techniques, including:
  • Event-driven simulator-based modeling;
  • System Verilog and UVM test bench development from scratch
  • Assertions, checkers, and functional coverage coding and closure techniques.
• Must be proficient in scripting languages – Python and TCL.
• Must understand RTL synthesis tools that convert RTL code into gate-level representations

These would be nice to have but are not required:

• Strong written and verbal communication abilities
• Exceptional collaboration skills across sites and functions

The employee can work from any location within the United States.