We are Silicon Labs. We are a leader in secure, intelligent wireless technology for a more connected world. Our integrated hardware and software platform, intuitive development tools, unmatched ecosystem and robust support make us the ideal long-term partner in building advanced industrial, commercial, home and life applications. We make it easy for developers to solve complex wireless challenges throughout the product lifecycle and get to market quickly with innovative solutions that transform industries, grow economies and improve lives.
Meet the team
The Digital Design and Verification team in Oslo is part of the Digital Subsystems (DSS) group at Silicon Labs.
Our group is responsible for research and development of digital architectures and IPs from concept to production. We develop processors (RISC-V), compute engines (AI/ML), accelerators, peripherals, and system IP. Activities include advanced research & development, high-level modeling, architecture, RTL design, timing/power/area optimization, formal and UVM verification within an automated framework. We value innovation, simplicity, quality, and smart development processes within a highly collaborative and learning-driven team.
Senior Digital Verification Engineer
As a member of an advanced R&D team, you will be responsible for verification that results in production-quality delivery of digital IPs. You will be working closely with architects, RTL design engineers, and IC teams. This will include subsystem or system-level verification to ensure functionally correct integration of the IP and its features into a design. IPs include accelerators, peripherals, system IP, advanced I/O, and processors including development of specialized instruction extension hardware for RISC-V
Responsibilities:
RTL frontend simulation.
Develop and track execution of IP test plans to meet specification requirements.
Execute and maintain IP verification regressions. Triage and debug of failing tests.
Architect and implement tests and testbenches for IP, subsystem and chip level verification. Tests will be a combination of directed (C tests), constrained random (UVM) and formal property verification (SVA).
Coverage definition, closure, grading and analysis.
Development of integration and re-use guidelines for IP integration.
Mentor junior engineers.
Provide support for IC teams in support and use of IPs.
Develop and evolve flows and methodologies for efficient and high-quality development.
Skill development and training on modern verification techniques such as formal verification and UVM.
Skills You’ll Need
Minimum Qualifications
5+ years of design verification experience
Industry experience developing testbenches with SystemVerilog and UVM is required
Knowledge of scripting/language (Python, PERL, shell)
Design/Verification skills
Software/Firmware coding (C)
UVM
SystemVerilog Assertions
Demonstrated experience in verifying high-complexity designs (accelerators, processors, bus-fabric, DMA, complex I/O peripherals, etc.)
Excellent verbal and written communication skills
Excellent debug skills in simulation, FPGA, and silicon environments
The following qualifications will be considered a plus:
Experience in verification of microprocessors
Experience with formal property verification.
Experience in verification/modeling of math-centric designs (security primitives, DSP units, AI/ML, etc.)
Experience with a high-level modeling language (e.g. SystemC, C++, Python) and its use within a system modeling environment (e.g. ARM SoC Designer, SystemC-capable simulator, etc.) for purposes of functional verification
FPGA prototyping
What You’ll Get
You will be joining a highly skilled and tight-knit team where every engineer makes a significant impact on the product. Our office is located in the beautiful, easily accessible Nydalen in Oslo.
We can also offer:
Monthly social gathering like summer and new year’s parties, celebrations, team building and happy hours (“lønningspils”).
Weekly sport activities like cageball, indoor climbing, running and squash.
Monthly innovation day - “Hack a Gecko” (hack-a-thon event for fun and learning).
Weekly information meeting for all employees.
Paid volunteer days.
Employee Stock Purchase Plan.
5 weeks of vacation, plus Christmas Eve and New Year's Eve.
Parking for car, motorbike and bikes.
Flexible working hours.
Free mobile telephone.
Last, but not least: an amazing culture with skilled colleagues.
Want to know what our employees are saying? Check us out on Glassdoor: https://www.glassdoor.com/Overview/Working-at-Silicon-Labs-EI_IE9122.11,23.htm
Sound like good match for you? Apply now!
We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status.